CMOS Inverter Desıgn | Testing | Layout Design | DRC and LVS | 90 nm Technology

CMOS Inverter 

In this post, we will discuss how we can design a CMOS inverter using Virtuoso's Layout XL and Schematic view.
For this, I assume that you have a good understanding of the transfer characteristics of CMOS inverter, especially the inversion voltage concept.

Link of Youtube Video where I explain how we can find the width of PMOS for inversion of the input.
https://www.youtube.com/watch?v=tSmhgFOO1wA&t=658s

Expected functionality

Input (x0)	Output (y)
1	0
0	1

CMOS Inverter Schematic

CMOS inverter Test environment (Symbol created assumption)

* Theoretical functionality confirmed.

CMOS Inverter Layout

Note: The body for NMOS is left tap and PMOS is right tap.



DRC Check

LVS Check

Hence we confirmed that the designed layout is matched with the schematic.